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4 mechanical engineer senior jobs found

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Lockheed Martin
May 12, 2026
ASIC & FPGA Design Engineer Sr
Lockheed Martin Orlando, FL
Description: You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team within Missiles & Fire Control (MFC). Our team delivers the digital heart beat that powers the Next Generation Short Range Interceptor (NGSRI), turning system level performance and safety goals into reliable, production ready FPGA hardware for the United States and allied forces. What You Will Be Doing As the senior ASIC & FPGA designer you will own the full lifecycle of the CLA FPGA—from high level architecture through release ready documentation—while mentoring junior talent and partnering with a broad set of cross functional experts. Your responsibilities will include: • Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog/SystemVerilog that satisfies performance, power, and reliability targets. • Developing synthesis, place and route, and timing closure strategies to guarantee deterministic operation on the...
Lockheed Martin
May 06, 2026
Senior Software Quality Engineer
Lockheed Martin Orlando, FL
Description: You will be the Senior Software Quality Engineer for the Software Quality Engineering Team. Our team is responsible for developing and maintaining systems and software quality processes that align with AS9100, program, and customer requirements. What You Will Be Doing As the Senior Software Quality Engineer you will be responsible for driving software quality excellence across the IRST program. Your responsibilities will include, but are not limited to: Develop and apply quality principles to software and software‑based systems. Design and implement software development and maintenance processes. Define audit strategies and ensure compliance with systems/software processes. Design, specify, and conduct test methods for software inspection, verification, and validation. Evaluate and analyze software quality systems to identify and correct deficiencies. Why Join Us The ideal candidate is a collaborative engineer who thrives in...
Lockheed Martin
Mar 12, 2026
ASIC & FPGA Design Engineer Sr
Lockheed Martin Orlando, FL
Description: You will be the Senior ASIC & FPGA Design Engineer for the Multi Domain Missile Warning Payload team. Our team creates large format, high frame rate imaging sensor systems that provide survivability enhancing situational awareness for air, space and surface platforms. What You Will Be Doing As the Senior ASIC & FPGA Design Engineer you will work side by side with a PLD subject matter expert to architect, design and implement programmable logic solutions for the imaging sensor system. You will integrate hardware, develop test plans and verify performance on demanding space based platforms, contributing to a scalable, high performance missile warning payload. Your responsibilities will include: • Define architecture and design specifications for programmable logic components, develop and document RTL (VHDL/Verilog/SystemVerilog) gate level designs that meet performance, power, and reliability requirements. • Create synthesis, place and route, and timing...
Lockheed Martin
Mar 12, 2026
ASIC & FPGA Design Engineer Senior
Lockheed Martin Orlando, FL
Description: You will be the Senior ASIC & FPGA Design Engineer for the Laser Weapon System (LWS) Turret Closing team. Our team is responsible for delivering high performance, low latency FPGA based closed loop motor control solutions that enable rapid, precise turret positioning for next generation directed energy weapons. What You Will Be Doing As the Senior ASIC & FPGA Design Engineer you will lead the end to end development of the FPGA motor control hardware, translating system level performance, safety and reliability requirements into a robust architecture, driving verification, hardware in the loop testing and integration, and shepherding the design from concept through production release. Your responsibilities will include: • Capturing and translating system level performance, safety and reliability requirements into a detailed FPGA architecture. • Developing and verifying RTL using SystemVerilog/Verilog and Xilinx/AMD toolsets, creating synthesis, timing and...
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