22 cloud engineer jobs found

Position: Senior Cyber Defense Engineer Job Description: What You'll Be Doing:   Incident Response & Investigations Lead complex cyber incident investigations across enterprise, cloud, hybrid, and on-premises environments. Conduct end-to-end incident response activities including triage, scoping, containment, eradication, recovery, and post-incident reporting. Investigate network intrusions, account compromise, ransomware, insider risk, fraud-related incidents, unauthorized access, and advanced threat actor activity. Preserve evidence and maintain chain-of-custody procedures for forensic, legal, compliance, and regulatory investigations. Produce clear investigative findings, root cause analysis, executive summaries, and remediation recommendations. Digital Forensics & Malware Analysis Perform DFIR activities across Windows, cloud, identity, endpoint, network, and application environments. Conduct dead-box forensic examinations, artifact...

Position: Device Engineer (eInfochips) Job Description: Job Description What You'll Be Doing: Perform Development and Verification for Flight Management system for avionics applications. Developing High Level and Low Level requirements from system requirements Analyze System level architectural requirements and use it for Design and Development of Software Requirements. Providing technical analysis by reviewing the artifacts What We Are Looking For: Bachelor’s Degree in Electrical or Computer Engineering. Development of Test cases and Test procedures execution. Generation of Test results and reports for the execution. Developing support utilities to reduce the cycle time and enhance the process. Perform Dry Run and RFS related activities. Co-ordination and team player What’s In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer...

Position: Device Engineer Job Description: What You'll Be Doing: Perform Development and Verification for Flight Management system for avionics applications. DO 178 DAL A verification Developing High Level and Low Level requirements from system requirements Analyze System level architectural requirements and use it for Design and Development of Software Requirements. Providing technical analysis by reviewing the artifacts What We Are Looking For: Bachelor’s Degree in Electrical or Computer Engineering. Development of Test cases and Test procedures execution. Generation of Test results and reports for the execution. Developing support utilities to reduce the cycle time and enhance the process. Perform Dry Run and RFS related activities. Co-ordination and team player What’s In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive...

Position: Embedded Engineer (eInfochip Inc) Job Description: NOTE: This role will perform work covered by International Traffic in Arms Regulations. Viable candidates for this position must be eligible for an export license or be a U.S. Person (which includes but is not limited to U.S. citizens or nationals, lawful permanent residents, refugees, and asylees). What You'll Be Doing: Compliance Requirement: Must be ITAR Compliant (U.S. Person – Citizen/Green card) Hands-on experience with Qualcomm QCS platforms (QCS6490, QCS8550, QCS5430, QCS610, QCS8250 or similar) Strong Embedded Linux development experience Expertise in C/C++ programming Experience with board bring-up and hardware-software integration BSP, Linux Kernel, Device Tree, and Device Driver development Experience debugging bootloader, kernel, and platform bring-up issues Familiarity with ARM-based architectures What we are looking for: Experience interfacing peripherals such as UART, SPI,...

Position: Embedded Firmware Engineer (eInfochips Inc) Job Description: NOTE: This role will perform work covered by International Traffic in Arms Regulations. Viable candidates for this position must be eligible for an export license or be a U.S. Person (which includes but is not limited to U.S. citizens or nationals, lawful permanent residents, refugees, and asylees). What You'll Be Doing: This is similar role is similar to embedded network engineer experienced  DO-178C  SOI-2 Dev Engineer to support certification of  Time-Sensitive Networking (TSN)  software for safety-critical avionics platforms. The engineer will participate in Software Development Reviews (SOI-2) by evaluating software requirements, architecture, detailed design, traceability, and compliance with DO-178C objectives. The role involves reviewing  TSN software components such as IEEE 802.1AS (gPTP), IEEE 802.1Qbv Time-Aware Shaper, IEEE 802.1Qav Credit-Based Shaper, IEEE 802.1CB FRER, ENETC...

Position: Hardware Engineer Job Description: What You'll Be Doing: Gather requirements and finalize the architecture for the next-gen HMI module based on various SoCs including Qualcomm and NXP, Reneses, ESP Electronics Design & Development, select components and design schematics, collaborate with customer on component placement and PCB size. Do layout design and high-speed interface guidelines, perform signal integrity, power integrity, and thermal analysis and review Gerber files. Testing Design sensor boards (Motion, Light, Accelerometer, Temperature, Gyroscope, Magnetometer, calibrate sensors) and integrate with HMI Module. Protocol experience in SPI, I2C, Serial, UART, USB, DSI, CSI Coordinate with fabrication, assembly, and integration teams, conduct bring-up, functional, EDVT, thermal, and performance testing. What We Are Looking For: Experience / Education Typically requires a 4 year degree in   electrical/electronics   and a minimum of 8...

Position: Design For Test Engineer III (IC) Job Description: What You'll Be Doing: DFT implementation for 3nm and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion using Tessent TestKompress ATPG pattern generation: Compressed and Uncompressed Mode Tools: Mentor Tessent, Cadence Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch debug using Verdi Scripting with Perl, Shell, TCL: DAeRT - DFT flow enhancement/automation in project Makefile enhancement using extended scripts and targets for flow enhancement MBIST Insertion and Verification: MBIST Insertion and Verification done on block on top Silicon debug and bring-up done for block and top IEEE 1149.1 JTAG Insertion and verification What We Are Looking For : 5 – 7 Years of experience in DFT Scan-Insertion, ATPG, GLS, Pattern...

Position: Device Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Perform development and verification compliance with DO 178B/C. Participate in Architectural and design phase. Perform Automation creating verification test suite and framework. Participate in SOI audits and certification documentation updates. Perform various analyses like SCA, stack analysis, and memory analysis. Participate in the entire responsibility of RFS activities (including test execution). What we are looking for: A bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 7 years of experience. Perform various analyses like SCA, stack analysis, and memory analysis. Participate in the entire responsibility of RFS activities (including test execution). Tunning control panel, (TCP) is preferable What’s In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why...

Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development. Develop complex self checking test benches with constraint random stimulus generation. Architect SoC test FW and create test plan documentation to cover ASIC features. Develop and debug SoC ASIC platform test FW and specific tests in C/C++. Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents. Implement and maintain integrated end-to-end formal verification flow for the formal verification objective....

Position: Physical Design Engineer II (eInfochips Inc) Job Description: What You'll Be Doing: Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals. Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks. Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with methodology owners. Partner with the design team to proactively identify and address potential physical design challenges, enabling efficient iteration and convergence. Contribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC). Troubleshoot flow issues and collaborate with EDA vendors to resolve them as needed. What we are looking for: Bachelor's degree...

Position: Design Verification Engineer(eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect  Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics. Job Complexity ● Requires in-depth knowledge and experience Solves complex problems; takes a new perspective using existing solutions ● Works independently; receives minimal guidance ● Acts as a resource for colleagues with less experience  Represents the...

Position: Senior Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Testbenches: Build scalable verification environments using UVM and SystemVerilog. Planning: Create detailed verification plans from architectural specifications. Execution: Write, run, and debug constrained-random tests and directed tests. Coverage: Define, measure, and close functional and code coverage metrics. Gate-Level: Run gate-level simulations to verify power-up and timing states. Automation: Develop scripts to automate regression runs and triage failures. What We Are Looking For: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Languages: Strong proficiency in SystemVerilog and scripting (Python, Perl, or Tcl). Methodology: Hands-on experience with UVM (Universal Verification Methodology) Tools: Experience with industry-standard simulators Cadence Xcelium preferred, but experience with Synopsys...

Position: FPGA Engineer Engineer (eInfochips) Job Description: Job Description Location: San Jose CA and Austin TX (Day-1 Onsite) Experience: 9+ Years What candidate will Be Doing: Proficient in Verilog/System Verilog coding constructs. Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting) Experience with high speed PCIe designs and protocols. Experience with Industry standard interface protocols such as AXI, APB, etc. Experience with ARM Fabric IPs. Experience with IPXACT. Understanding of Computer Architecture fundamentals. Ability to write scripts using Python, Tcl, Perl etc. Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus. Proficiency with UPF (Low power intent) Proficiency in clock crossing techniques. Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals....

Position: Design Verification Engineer (Einfochips) Job Description: Experience: 6+ Years Location: Austin TX and San Jose CA   Job Description: What candidate will Be Doing: At-least   6+ years of experience   in   System Verilog HVL and C++/C At-least 6+ year of experience in   UVM. Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure. Proficient in   SVTB/UVM, C++ testbench Understand DSP is a plus Subversion for Repository and Bugzilla is also a Plus Proficient in debug   and assertions coding Verification closure with team What We Are Looking For: At-least 6 + years of experience   in   System Verilog HVL and C++/C At-least 6+ year of experience in   UVM. Make/Perl/Python / any script Any protocol experiace is fine...

Position: ASIC Design Engineer (eInfochips) Job Description: Role:   Asic Design Engineer Location: Mountain View CA (Remote) Note:   Seeking candidate with Fusion Compiler and Scripting experince. What candidate will Be Doing: Proficient in Verilog/System Verilog coding constructs. Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting) Experience with high speed PCIe designs and protocols. Experience with Industry standard interface protocols such as AXI, APB, etc. Experience with ARM Fabric IPs. Experience with IPXACT. Understanding of Computer Architecture fundamentals. Ability to write scripts using Python, Tcl, Perl etc. Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus. Proficiency with UPF (Low power intent) Proficiency in clock crossing techniques. Knowledge of Static Timing Analysis and understanding of timing...

Position: Device Engineer Job Description: What You'll Be Doing: Perform Development and Verification for Flight Management system for avionics applications. Developing High Level and Low Level requirements from system requirements Analyze System level architectural requirements and use it for Design and Development of Software Requirements. Providing technical analysis by reviewing the artifacts What We Are Looking For: Bachelor’s Degree in Electrical or Computer Engineering. Development of Test cases and Test procedures execution. Generation of Test results and reports for the execution. Developing support utilities to reduce the cycle time and enhance the process. Perform Dry Run and RFS related activities. Co-ordination and team player What’s In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including...

Position: Device Engineer (eInfochips) Job Description: Role: Embedded Engineer (BSP) Location: Peachtree City GA (Day-1 Onsite) What candidate will Be Doing: Design, develop, and optimize software solutions for Android Automotive OS and Linux BSP platforms.  Coordinate closely with cross-functional teams spanning Software, Validation, and Electrical disciplines to ensure seamless integration and delivery.  Communicate with external technology partners on a weekly basis, aligning on deliverables, technical roadmaps, and issue resolution.  Drive technical decisions, conduct code reviews, and uphold best engineering practices across the team.  Collaborate with hardware and systems teams to support software integration across vehicle platforms.  What we are looking for: Typically requires a 4 year degree and a minimum of 5 years of related experience; or an advanced degree without experience; or equivalent work experience Work Arrangement...

Position: Design For Test Engineer IV (IC) Job Description: What You'll Be Doing: DFT implementation for 3nm and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion using Tessent TestKompress ATPG pattern generation: Compressed and Uncompressed Mode Tools: Mentor Tessent, Cadence Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch debug using Verdi Scripting with Perl, Shell, TCL: DAeRT - DFT flow enhancement/automation in project Makefile enhancement using extended scripts and targets for flow enhancement MBIST Insertion and Verification: MBIST Insertion and Verification done on block on top Silicon debug and bring-up done for block and top IEEE 1149.1 JTAG Insertion and verification What We Are Looking For : 5 – 7 Years of experience in DFT Scan-Insertion, ATPG, GLS, Pattern...

Position: Hardware Engineer (eInfochips) Job Description: Role: Hardware Engineer Location: Bedford, MA (Day-1 Onsite) What candidate will Be Doing: Experience on all stages of Hardware Product Development Lifecycle. Microcontroller: ST, Microchip, TI, based architecture design Analog and mixed signal design, ADC and DAC circuit design experience, Signal conditioning Operational amplifier, discrete component analog circuit design experience AC to DC and DC to DC power supply design Knowledge of interfaces like RS232, RS485, I2C, SPI, UART, Wi-Fi, BT, Zigbee would be plus. Electromagnetic Interference (EMI) / Electromagnetic compatibility (EMC) compliance for automotive products. Various tools like ORCAD, ALLEGRO, ALTIUM, PADS. Lab instruments like Multi- meters, Oscilloscope, Function Generator, Logic analyzer etc. What we are looking for: Responsible for the research, design, development and testing computer systems and components. Design new...

Position: Hardware Design Engineer(Einfochips Inc.) Job Description: What candidate will Be Doing: Drive and contribute to all stages of the Hardware Product Development Lifecycle, from concept to production. Design and develop hardware architectures based on microcontrollers including ST, Microchip, and Texas Instruments (TI). Create analog and mixed-signal circuit designs including ADC/DAC, signal conditioning, and discrete analog components. Design and validate AC-DC and DC-DC power supply circuits to meet system requirements. Work on signal integrity and noise management using operational amplifiers and discrete components. Develop and implement communication interfaces such as RS232, RS485, I2C, SPI, UART; exposure to wireless protocols (Wi-Fi, Bluetooth, Zigbee) is a plus. Ensure compliance with Electromagnetic Interference (EMI) and Electromagnetic Compatibility (EMC) standards, especially for automotive-grade products. Utilize EDA...