3 project engineer staff level 4 jobs found

Position: Design Verification Engineer IV Job Description: Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development  * Develop complex self checking test benches with constraint random stimulus generation. * Architect SoC test FW and create test plan documentation to cover ASIC features. * Develop and debug SoC ASIC platform test FW and specific tests in C/C++. * Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification objective. * Develop/modify scripts to automate the verification process. * Develop verification environment including environment assumptions, assertions, and cover properties in context of the...

Position: Design Verification Engineer Job Description: Principal Accountabilities * Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect * Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics. Job Complexity ● Requires in-depth knowledge and experience ● Solves complex problems; takes a new perspective using existing solutions ● Works independently; receives minimal guidance ● Acts as a resource for colleagues with less experience ● Represents the level at which career may stabilize for many years or even until retirement ● Contributes to process improvements ● Typically resolves problems using existing solutions ● Provides informal...

Position: Design Verification Engineer Job Description: Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development  * Develop complex self checking test benches with constraint random stimulus generation. * Architect SoC test FW and create test plan documentation to cover ASIC features. * Develop and debug SoC ASIC platform test FW and specific tests in C/C++. * Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification objective. * Develop/modify scripts to automate the verification process. * Develop verification environment including environment assumptions, assertions, and cover properties in context of the...