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2 advanced asic fpga engineer jobs found

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United States advanced asic fpga engineer Florida
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Lockheed Martin
Apr 28, 2026
FPGA Engineer Lead
Lockheed Martin Orlando, FL
Description: You will be the FPGA Engineer Lead for the ATWS Directed Energy Imaging team. Our team delivers advanced imaging platforms by defining FPGA architectures, developing RTL, validating designs, and fielding production ready hardware that meets stringent performance, cost, and schedule goals. What You Will Be Doing As the FPGA Engineer Lead you will own the end to end development of FPGA solutions and coordinate a multidisciplinary group of systems engineers, software developers, and hardware integrators. You’ll translate system requirements into reliable, high performance hardware while keeping technical risk in check and communicating progress to senior leadership and customers. Your responsibilities will include: • Defining FPGA architecture and creating high quality RTL using AMD/Xilinx Versal and UltraScale+ families. • Driving verification and validation activities, including board level testing and video/signal processing implementation. • Managing task...
Lockheed Martin
Mar 17, 2026
FPGA Design Engineer Sr
Lockheed Martin Orlando, FL
Description: You will be the FPGA Design & Verification Engineer for the Lockheed Martin Advanced Technologies team. Our team creates cutting edge FPGA based solutions that power next generation defense and aerospace systems, delivering high performance computing, signal processing and real time control. What You Will Be Doing As the FPGA Design & Verification Engineer you will capture and derive system requirements, design, simulate and integrate FPGA architectures, and develop verification environments. You will troubleshoot existing designs, implement updates, and build new FPGA solutions from concept through production, working closely with the Programmable Logic Design Lead and cross functional engineers. Your responsibilities will include: • Translating system requirements into detailed FPGA designs, writing HDL code (SystemVerilog preferred, VHDL acceptable) and generating synthesis, placement, routing and timing constraints. • Developing self checking...
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