3 jobs found in Remote Unavailable

Basic Qualifications Requires a Bachelor’s degree in Software Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience. Agile experience preferred.     CLEARANCE REQUIREMENTS: Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibilities for this Position ROLE AND POSITION OBJECTIVES: As an Advanced Software Engineer for Airborne Systems, you’ll be a member of a cross functional team responsible for airborne computers that process and display mission data in the cockpit, to crypto products for...

Basic Qualifications Requires a Bachelor’s degree in Software Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 8+ years of job-related experience, or a Master's degree plus 6 years of job-related experience. Agile experience preferred.     CLEARANCE REQUIREMENTS: Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibilities for this Position ROLE AND POSITION OBJECTIVES: As an advanced software engineer, you’ll be a member of a cross functional team responsible for developing full-stack embedded software with Realtime Operating Systems using agile methodologies that complies with...

Position: Senior Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Testbenches: Build scalable verification environments using UVM and SystemVerilog. Planning: Create detailed verification plans from architectural specifications. Execution: Write, run, and debug constrained-random tests and directed tests. Coverage: Define, measure, and close functional and code coverage metrics. Gate-Level: Run gate-level simulations to verify power-up and timing states. Automation: Develop scripts to automate regression runs and triage failures. What We Are Looking For: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Languages: Strong proficiency in SystemVerilog and scripting (Python, Perl, or Tcl). Methodology: Hands-on experience with UVM (Universal Verification Methodology) Tools: Experience with industry-standard simulators Cadence Xcelium preferred, but experience with Synopsys...