8 engineering jobs found in San Jose

Position: Job Posting Title Design For Test Enginineer IV Job Description: Location: US-CA-San Jose, California (Cisco) Time Type: Full time Job Category: Engineering Services EEO Statement: Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.  (Arrow EEO/AAP policy) All Arrow job postings are for existing job vacancies. We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.

Position: Design For Test Engineer IV (IC) Job Description: What You'll Be Doing: DFT implementation for 3nm and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion using Tessent TestKompress ATPG pattern generation: Compressed and Uncompressed Mode Tools: Mentor Tessent, Cadence Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch debug using Verdi Scripting with Perl, Shell, TCL: DAeRT - DFT flow enhancement/automation in project Makefile enhancement using extended scripts and targets for flow enhancement MBIST Insertion and Verification: MBIST Insertion and Verification done on block on top Silicon debug and bring-up done for block and top IEEE 1149.1 JTAG Insertion and verification What We Are Looking For : 5 – 7 Years of experience in DFT Scan-Insertion, ATPG, GLS, Pattern...

Position: Design Verification Engineer IV Job Description: Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development  * Develop complex self checking test benches with constraint random stimulus generation. * Architect SoC test FW and create test plan documentation to cover ASIC features. * Develop and debug SoC ASIC platform test FW and specific tests in C/C++. * Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification objective. * Develop/modify scripts to automate the verification process. * Develop verification environment including environment assumptions, assertions, and cover properties in context of the...

Position: Design Verification Engineer Job Description: Principal Accountabilities * Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect * Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics. Job Complexity ● Requires in-depth knowledge and experience ● Solves complex problems; takes a new perspective using existing solutions ● Works independently; receives minimal guidance ● Acts as a resource for colleagues with less experience ● Represents the level at which career may stabilize for many years or even until retirement ● Contributes to process improvements ● Typically resolves problems using existing solutions ● Provides informal...

Position: Design Verification Engineer (eInfochips) Job Description: What You'll Be Doing: Strong in SV/UVM scale test bench AXI expertise, NOC/Crossbar, Performance Regression/Triage and coverage closure Need asap → Program has already started and is in execution Ability to work on Amazon tools, flows, methodology. Work is in start-up mode with less documentation available What we are looking for: A bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a Master's Degree in Electrical or Computer Engineering with at least 8 years of experience in ASIC or a related discipline. Verification closure with team Make/Perl/Python  Ensure customer satisfaction. Reporting to customer on daily or weekly progress effectively Education: Bachelor's degree required Work Arrangement Fully Onsite: Must be able to travel to an Arrow Client office location as requested by Arrow...

Position: Associate Director - Sales (Einfochips) Job Description: What You’ll Be Doing: Pro-active analysis of Digital Engineering and embedded opportunities in the target business lines and identify potential customers Develop and present the eInfochips value propositions – in Embedded, Firmware, software, IOT, Mobility, AI/ML. Analytics, Cloud Operations and others to the potential customers. Understanding of Customer digital transformation and Industry technology trends. Hunt/prospect/call on mid-size and enterprise customers across Western US. Identify pain points and immediate / tactical needs of assigned customers and make a quick entry into these customers. Run complete sales process for all opportunities including initial client communication, on-site presentations, proposal creation and submission, negotiation and deal signing. Drive the closure of contracts and project specific agreements Achieve monthly, quarterly and annual sales targets Achieve...

Position: Sr DFT Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Design and implement DFT, including scan, MBIST, ATPG, Sims, Post-Si diagnosis at block and SoC level Verify test patterns using gate-level simulations. Collaborate closely with Synthesis, STA and physical design to debug and resolve DFT-related problems. Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing. What We Are Looking For: Strong understanding of industry standards and best practices in DFT - Scan, ATPG, JTAG, and MBIST. Proven experience in developing DFT specifications and architectures for complex designs. Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more. Proficiency in Siemens-Tessent, Synopsys for DFT implementation, vector generation, and verification. Ability to conduct experiments during silicon debug, effectively gather and analyze data to...

Position: FPGA Design Engineer Job Description: Location: Mountain View, CA (Remote)  What will you do: Strong expertise on Arteris/ NOC Design Toolset  At-least 5+ years of experience in Verilog Design AMBA AXI bus along-with ARM or C based processor Ensure customer satisfaction. Reporting to customers on daily or weekly progress effectively What we are looking for: Strong expertise along-with complex SoC/IP debug is must At-least 5+ years of experience in System Verilog HVL and C/C++. AMBA AXI bus along-with ARM or C based processor Bi-frost/Processor based C and SV/UVM mix Verification. Experience in complete verification cycle which includes development of test plan,  BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure. Make/Perl/Python What’s In It for You: At Arrow, we recognize that financial rewards and great...