8 information assurance engineer jobs found in San Jose

Basic Qualifications Education Requirements: Bachelor's degree in Engineering, or a related Science or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.   Clearance Requirements: Department of Defense Top Secret security clearance is required at time of hire. Must be able to obtain SCI. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required Responsibilities for this Position General Dynamics Mission Systems has an immediate opening for an Information Assurance Security Professional. This position provides an opportunity to further advance the cutting-edge technology that supports some of our nation’s core defense/intelligence services and...

Position: Field Application Engineer - San Jose Job Description: Job Summary: Dedicated NXP Field Application Engineer (FAE) responsible for driving demand creation, design registrations, and design wins by providing technical leadership and application support for NXP solutions. Acts as the primary technical liaison between Arrow, NXP, and customers, partnering with sales teams to identify opportunities, influence customer designs, and accelerate revenue growth. Develops strong relationships with customers and NXP stakeholders, delivers technical training and support, and drives strategic initiatives through customer engagement, solution development, and engineering-focused business growth. Requires strong technical expertise in semiconductor and embedded system solutions, along with the ability to translate customer requirements into successful design opportunities. What You'll Be Doing: Serve as a dedicated Field Application Engineer (FAE) supporting NXP, acting...

Position: Field Applications Engineer- FPGA Job Description: Why You'll Love This Role Engineering is where ideas become reality. At Arrow, our engineers help transform innovation into practical technology solutions that enable customers around the world to move faster, solve complex challenges, and stay ahead of what's next. Whether you're developing software, designing hardware, advancing AI, or building nextgeneration infrastructure, you'll collaborate with global teams, work with emerging technologies, and help shape the future of innovation while growing your career at Arrow. This role will perform work covered by International Traffic in Arms Regulations. Viable candidates for this position must be eligible for an export license or be a U.S. Person (which includes but is not limited to U.S. citizens or nationals, lawful permanent residents, refugees, and asylees). What You'll Do...

Position: Design For Test Engineer III (IC) Job Description: What You'll Be Doing: DFT implementation for 3nm and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion using Tessent TestKompress ATPG pattern generation: Compressed and Uncompressed Mode Tools: Mentor Tessent, Cadence Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch debug using Verdi Scripting with Perl, Shell, TCL: DAeRT - DFT flow enhancement/automation in project Makefile enhancement using extended scripts and targets for flow enhancement MBIST Insertion and Verification: MBIST Insertion and Verification done on block on top Silicon debug and bring-up done for block and top IEEE 1149.1 JTAG Insertion and verification What We Are Looking For : 5 – 7 Years of experience in DFT Scan-Insertion, ATPG, GLS, Pattern...

Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development. Develop complex self checking test benches with constraint random stimulus generation. Architect SoC test FW and create test plan documentation to cover ASIC features. Develop and debug SoC ASIC platform test FW and specific tests in C/C++. Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents. Implement and maintain integrated end-to-end formal verification flow for the formal verification objective....

Position: Design Verification Engineer(eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect  Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics. Job Complexity ● Requires in-depth knowledge and experience Solves complex problems; takes a new perspective using existing solutions ● Works independently; receives minimal guidance ● Acts as a resource for colleagues with less experience  Represents the...

Position: Market Development Engineer Job Description: This Market Development Engineer will be primarily responsible for supporting customer’s technical needs around low power IoT Wireless electronic components like WiFi, Bluetooth, ZigBee and Thread SoCs.  In addition, the ideal candidate should also have strong background in ARM-based multi-core application processor solutions (32-bit and 64-bit) from suppliers like Qualcomm.  What You'll Be Doing Responsible for utilizing an advanced understanding of the customer needs and technical leadership expertise to champion return on engineering investment. • Drive demand creation by maximizing Arrow content on designs. Understand customer needs and leverage Arrow’s engineering and design services resources to facilitate solutions for customers. Apply technical knowledge to influence designs utilizing solution selling, resources, and strategies.  Partner with the sales team across pre-and post-sales activities, providing...

Position: Design For Test Engineer IV (IC) Job Description: What You'll Be Doing: DFT implementation for 3nm and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion using Tessent TestKompress ATPG pattern generation: Compressed and Uncompressed Mode Tools: Mentor Tessent, Cadence Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch debug using Verdi Scripting with Perl, Shell, TCL: DAeRT - DFT flow enhancement/automation in project Makefile enhancement using extended scripts and targets for flow enhancement MBIST Insertion and Verification: MBIST Insertion and Verification done on block on top Silicon debug and bring-up done for block and top IEEE 1149.1 JTAG Insertion and verification What We Are Looking For : 5 – 7 Years of experience in DFT Scan-Insertion, ATPG, GLS, Pattern...