Arrow Electronics
San Jose, CA
Position: Design For Test Enginineer IV Job Description: Principal Accountabilities * Responsible for scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/ SDF. * Ensure successful delivery of DFT deliverables to customers from technical aspects * Debug and find root cause the problem in simulation failures * Work cross sites with design team to define and implement. * Collaborate to enhance best practices of the DFT in team in terms of new methodology, new technology, tools and related aspects. * Functioning with clients, technical teams for securing & executing concurrent objectives. * Envisioning usage of new technology and tailoring its usage for achieving desired results * Support in mapping business requirements, designing customized solutions with strong analytical skills & capability to analyze business practices and define optimal procedures Job Complexity ● Requires in-depth knowledge and experience ● Solves complex problems;...